As a digital design engineer, my responsibilities involved analyzing predefined models of optical communication modules written in C++ and translate them into an HDL (in our case, Verilog was the language of choice) so that these modules could then be realized into an actual electronic system.
The process mostly involved validation of such translation, ensuring that when both the C++ and Verilog modules were fed with the same input they would produce exactly the same outputs. This process required setting up all possible different inputs to the modules, capturing the outputs and comparing them, and running this cycle every time there was a change in the codebase.
Given how crucial and time consuming this process was, I volunteered myself to develop automation tools that would allow engineers to easily specify the complete set of inputs to use as test cases, generate the expected outputs, execute the tests and detect any mismatch. These automation tools were then incorporated into our development lifecycle as a regression testing mechanism, allowing the organization to confidently write code and deliver the final codebase that would be eventually transformed into microchips.